Fail-safe and reconfigurable chips

By 22 diciembre, 2018Technology

Researchers of the Telecommunications and Multimedia Applications Institute (iTEAM) of Valencia’s Polytechnic University (UPV) have taken one more step towards creating an infallible chip. From their laboratories, they have developed an advanced method for the analysis and à la cart configuration of photonic circuits, which makes it possible to pre-emptively deal with the possible faults that a chip may suffer and ‘reduce its impact’ in the design phase, before they become operational.

All-focus

All-focus

The work of the UPV researchers is centred on the generic-purpose photonic circuits; these circuits are able to provide multiple functionalities while using a single architecture, in an analogue way to how microprocessors work in electronics. “With the tools we have developed, we will simplify and optimise the manufacturing and performance of these chips,” highlights José Capmany, researcher at the Photonics Research Labs (PRL) of the iTEAM UPV.

According to professor Capmany, faults take place on many occasions within the components of the circuits, which end up affecting their final performance. “The technique makes it possible to predict where the circuit will fail and to, from there, configurate the other components to make up for these deficiencies, thus guaranteeing their maximum performance,” he states. And all this is done in an invisible way for the user.

“The analysis method is relatively simple: each one of the units of the circuit is configurated and, applying mathematic induction techniques, offers a diagnosis of how the circuit would behave in each of the ports. Based on this diagnosis, we can conduct the modifications we see necessary in the configuration,” explains Daniel Pérez, fellow researcher at the PRL-iTEAM of the UPV. “Furthermore, the method enables us to simulate larger circuits and validate their capabilities with current manufacturing techniques.”

Another benefit of the work developed by the iTEAM is the chip cost decrease. “If you are able to optimise the circuit with software, the manufacturing phase is not as demanding, which makes it possible to increase the performance when producing these devices,” adds Capmany.

Chips with Artificial Intelligence

The work developed by the iTEAM researchers also entails a first step for the design and manufacturing of photonic circuits with Artificial Intelligence techniques. “With this method, we can use machine learning algorithms to synthesise and design circuits. Current day work is the seed that an automated learning method needs,” adds Daniel Pérez.

The next challenge for the UPV iTEAM researchers is to merge their most recent works for the design of hardware of the circuits with advanced algorithms that make it possible to squeeze all the potential out of the integrated optics.

Reference

Perez, Daniel & Capmany, J. (2018). Scalable Analysis for Arbitrary Photonic Integrated Waveguide Meshes. Optica.

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